In the field of semiconductors, demand for integrated circuits of a higher density is increasing for improving efficiency of handling information. For realizing such higher density integrated circuits, there has been a proposal for a technique of applying exposure wavelength of extreme ultra-violet ray (EUV) in a chip manufacturing process. A mask substrate of an exposure apparatus used in this technique is obtained by polishing an extremely low expansion material and highly accurate flatness and surface roughness are required for such mask substrate. As materials of a mask substrate and a mirror substrate for EUV micro-lithography, extremely low expansion materials such as CLEARCERAM (trademark) of Ohara Inc., Zerodur (trademark) of Schott AG, Zerodur-M (trademark) of Schott GmbH and ULE (trademark) of Corning Incorporated are suitable, for these materials have a very small thermal expansion coefficient and high homogeneity.
Japanese Patent Application Laid-open Publication No. 2004-228563 discloses a method for producing a substrate suited for EUV micro-lithography from such materials. This publication reports that, even if a substrate is polished to surface roughness of 0.1 nm to 0.3 nm at RMS (root-mean-square roughness), application of ion beam processing for achieving desired flatness causes increase in the surface roughness to twofold to five-fold the value before application of the ion beam processing. In this publication, a covering layer is formed on the base layer of the substrate for evading such increase in surface roughness. This method, however, has not realized flatness and surface roughness required for the base layer per se.
Japanese Patent Application Laid-open Publication No. 2004-29735 discloses a substrate for electronic devices and a method for polishing the substrate. The substrate obtained by this polishing method, however, does not exhibit surface property values which are better than flatness of 230 nm and surface roughness Ra of 0.18 nm. Since Ra (arithmetic mean roughness) which is a parameter indicating surface roughness is lower than a value of RMS (root-mean-square roughness), the surface roughness of Ra 0.18 nm is a value exceeding 0.20 nm when it is expressed in RMS. Further, a material for a substrate considered in this publication is glass only and no consideration is given to achievement of desired surface property values by polishing materials other than glass including glass-ceramics such as the above mentioned CLEARCERAM of Ohara, Inc.
Thus, in the high accuracy region required by EUV lithography, flatness and surface roughness are surface properties which conflict with each other and, when an attempt is made to achieve one of these surface properties, the other surface property fails to achieve a desired value. In the past, accordingly, there has not been a substrate which satisfies both flatness of less than 230 nmPV (peak-to-value) and surface roughness at RMS of less than 0.20 nm simultaneously without providing a special cover layer on the base layer of the substrate.
It is, therefore, an object of the present invention to provide substrates having excellent flatness and surface roughness in the high accuracy region, particularly substrates for liquid crystal display and electronic devices including semiconductor wafers or information recording medium and, more particularly, substrates for EVU micro-lithography, without providing a cover layer but by having such surface properties in the substrate per se.
It is also an object of the invention to provide a method for polishing such substrates.